CSc 4250/6250 Homework #4
Date assigned: November 17
Date due: November 30
Multiplier, D Register, and Demux
You do NOT need to use Magic.
- Show how you can make the parts below in CMOS
- write down your assumptions
- break the design down into smaller pieces
- detail the smaller pieces in terms of transistors
- using block representations, show how the small pieces connect.
By "block representations", I mean that all parts should be represented
as a rectangle or square, of proportional size. For example, an inverter
would be about half the width of a 2-input NAND gate, but both
would have the same height.
All parts should have inputs along the top and outputs along the bottom,
just like we do in class, along with Vdd and GND lines.
1. Design a 4 bit Booth multiplier using N and P transistors.
The multiplier has 2 inputs (4 bits each), and an output of 8 bits.
Assume that both operands are positive.
2. Show how you can make a D-register by using 2 D-latches.
That is, assuming that you have a working design for a D-latch, how can
you connect two together to form a D-register, using N and P transistors?
3. Design a 1-to-4 Demux, using only parts that you created in the
previous homeworks (plus any transistrors that you need).
You do not have to draw it in Magic, just show
how the parts would be connected together.
Label them appropriately. You need to clearly communicate
on paper how you can make the 1-to-4 Demux.
What to turn in:
You do not need to submit any files to the TA for this homework. All
work should be done on paper. All drawings should be either made on a
computer, or done very neatly by hand.
This is an individual assignment.