How are the number of address lines related to the amount of memory?

Explain what is happening in Figure 2.25, using Figure 2.24 as a reference.
Talk about the 5 steps that Figure 2.25 shows.

If a microprocessor has an address space of 64KB, how can you connect
2 memory chips (say a 32KB ROM and a 32KB RAM) to it?

What are the 3 different types of bus handshaking?

What is DMA? What does UART mean? What is an IRQ? What is a watchdog timer?
What is "the bus"? What is "glue circuitry"?

How can you connect programmable logic to find the following logic?
f = a'b'c + abc'
Assume the inputs, the output, 0, and 1, are available on the left side 
as vertical line segments. The logic units have an AND, OR, NOT, and
buffer connected to them, with 2 bits to select which value passes through
to the output. The output connects to a horizontal line segment.


What are hardware versus software concerns for ES design?